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Design and Analysis of Low Dropout Regulator using Ground Regulation Technique
그라운드 제어 방법을 이용한 Low Dropout Regulator의 설계와 분석

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Authors
박성호
Advisor
정덕균
Major
공과대학 전기·정보공학부
Issue Date
2018-08
Publisher
서울대학교 대학원
Description
학위논문 (석사)-- 서울대학교 대학원 : 공과대학 전기·정보공학부, 2018. 8. 정덕균.
Abstract
With a continuously high demand for portable electronic devices and System-on-Chip (SoC) devices in market, which uses Li-ion batteries, design of a low dropout regulator (LDO) with a high power supply rejection (PSR) is crucial to reject deterministic output ripple of a DC-DC converter, which is in between the battery output and a low dropout regulator, at the switching frequencies.

In response, this thesis presents a low dropout regulator with high unity gain bandwidth using ground regulation technique. The proposed low dropout regulator targets to have wide loop gain unity gain bandwidth to have the power supply rejection to be high even at high frequency (~ 1 MHz). Because wide bandwidth implies high quiescent current for an LDO, ground regulation technique with a reference change has been applied to reduce the current dissipation.

The proposed low dropout regulator is intended to be fabricated in 65 nm CMOS technology, achieves power supply rejection of -50.5 dB at 1 MHz, and dissipates quiescent current of 212 μA, which is a number that is reduced by 3 times from its complementary conventional LDO design with similar LDO performance.



Keywords : Low Dropout Regulator (LDO), Portable Electronic Devices, System-on-Chip (SoC), Ground Regulation, Power Supply Rejection (PSR), Quiescent Current

Student Number : 2016-22765
Language
English
URI
https://hdl.handle.net/10371/143750
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Theses (Master's Degree_전기·정보공학부)
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