Utilizing Middle-of-Line Resource in Filler Cells for Fixing Routing Failures

Abstract

As the process technology progresses, it becomes much hard to make a complete routing for all nets in chip implementation. Consequently, lots of effort is devoted to the ECO (engineering-change-order) routing to fix the routing failures. In this paper, we propose to use the LISD (local interconnect to source/drain) metal resource in the middle-of-line (MOL) layer of filler cells. So far, no previous work has addressed the problem of using LISD resource in filler cells for routing. For each of unroutable nets, we perform the following three steps: (1) we collects all the filler cells in the bounding box of the target net terminals, (2) we replace the routing segments that pass over the filler cells extracted in step 1 with LISD metals to make more metals on top of LISD available to use for routing, and (3) we then apply a conventional ECO router to the target net. Through experiments with benchmark circuits, it is shown that our proposed ECO router that utilizes the LISD metal resource in MOL layer is able to produce chip implementations with on average 21.43% less number of routing failures over the implementations without using LISD resource.