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Fast Simulation Method for Analog Deep Binarized Neural Networks
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Chaeun | - |
dc.contributor.author | Kim, Jaehyun | - |
dc.contributor.author | Kim, Jihun | - |
dc.contributor.author | Hwang, Cheol Seong | - |
dc.contributor.author | Choi, Kiyoung | - |
dc.date.accessioned | 2022-10-17T04:28:34Z | - |
dc.date.available | 2022-10-17T04:28:34Z | - |
dc.date.created | 2022-10-11 | - |
dc.date.issued | 2019-10 | - |
dc.identifier.citation | 2019 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), pp.293-294 | - |
dc.identifier.issn | 2163-9612 | - |
dc.identifier.uri | https://hdl.handle.net/10371/186310 | - |
dc.description.abstract | We propose a simulation method for analog deep binarized neural networks which enables fast and accurate simulation. This method is based on look-up tables and can accelerate simulation on a GPU. It extracts the look-up tables using a circuit simulator such as SPICE under various types of environments. To prove the validity of this method, we show the experimental results for analog deep binarized neural networks. In the experiment, we could accelerate the simulation by 612K times compared to FineSim simulation on an example of multi-layer perceptron. | - |
dc.language | 영어 | - |
dc.publisher | IEEE | - |
dc.title | Fast Simulation Method for Analog Deep Binarized Neural Networks | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/ISOCC47750.2019.9078516 | - |
dc.citation.journaltitle | 2019 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC) | - |
dc.identifier.wosid | 000694734600052 | - |
dc.identifier.scopusid | 2-s2.0-85084646443 | - |
dc.citation.endpage | 294 | - |
dc.citation.startpage | 293 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Hwang, Cheol Seong | - |
dc.contributor.affiliatedAuthor | Choi, Kiyoung | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
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