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An RRAM-based Analog Neuron Design for the Weighted Spiking Neural network
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Chaeun | - |
dc.contributor.author | Kim, Jaehyun | - |
dc.contributor.author | Choi, Kiyoung | - |
dc.date.accessioned | 2022-10-18T00:34:32Z | - |
dc.date.available | 2022-10-18T00:34:32Z | - |
dc.date.created | 2022-10-17 | - |
dc.date.issued | 2019-10 | - |
dc.identifier.citation | 2019 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), pp.259-260 | - |
dc.identifier.issn | 2163-9612 | - |
dc.identifier.uri | https://hdl.handle.net/10371/186405 | - |
dc.description.abstract | Spiking neural networks (SNNs) are promising because they have the ability to represent signal strength information with a simple sequence of spikes having the same height. In this paper, we propose an RRAM-based analog neuron circuit for the weighted spiking neural network which is energy-efficient and hardware-friendly. We have designed the neuron circuit to show that the weighted spiking neural network can be implemented in analog and works properly. | - |
dc.language | 영어 | - |
dc.publisher | IEEE | - |
dc.title | An RRAM-based Analog Neuron Design for the Weighted Spiking Neural network | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/ISOCC47750.2019.9078507 | - |
dc.citation.journaltitle | 2019 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC) | - |
dc.identifier.wosid | 000694734600038 | - |
dc.identifier.scopusid | 2-s2.0-85113863812 | - |
dc.citation.endpage | 260 | - |
dc.citation.startpage | 259 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Choi, Kiyoung | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
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