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A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ calibration for Memory Interfaces

Cited 1 time in Web of Science Cited 4 time in Scopus
Authors

Jeong, Yong-Un; Park, Hyunkyu; Hyun, Changho; Kim, Suhwan

Issue Date
2020-06
Publisher
IEEE
Citation
2020 IEEE SYMPOSIUM ON VLSI CIRCUITS, p. 9162864
Abstract
This paper presents a single-ended transmitter (TX) with a voltage-mode (VM) PAM-4 driver. The proposed driver simultaneously satisfies impedance matching and linearity, and occupies a small area without resistors and inductors. A ZQ calibration scheme that automatically and precisely adjusts the PAM-4 driver is also addressed. The proposed calibration has three calibration points, which allow the driver to have high linearity by taking into account the impedance variations of the TX and the receiver (RX) according to the output levels. The prototype chip is fabricated in 65 nm CMOS process and occupies 0.0333 mm(2). The proposed TX achieves a data rate of 28 Gb/s/pin with the level separation mismatch ratio (RLM) of 0.993 while consuming 0.64 pJ/b.
URI
https://hdl.handle.net/10371/186475
DOI
https://doi.org/10.1109/VLSICircuits18222.2020.9162864
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