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A 0.1 1.62-to-10.8Gb/s Video interface Receiver with Fully Adaptive Equalization Using Un-Even Data Level

DC Field Value Language
dc.contributor.authorLee, Jinhyung-
dc.contributor.authorLee, Kwangho-
dc.contributor.authorKim, Hyojun-
dc.contributor.authorKim, Byungmin-
dc.contributor.authorPark, Kwanseo-
dc.contributor.authorJeong, Deog-Kyoon-
dc.date.accessioned2022-10-26T07:21:06Z-
dc.date.available2022-10-26T07:21:06Z-
dc.date.created2022-10-20-
dc.date.issued2019-06-
dc.identifier.citation2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C198-C199-
dc.identifier.urihttps://hdl.handle.net/10371/186751-
dc.description.abstractThis paper presents a 65nm CMOS 1.624o -10.8(112/s video interface receiver with fully adaptive equalizers incorporating CTLE and 2 -tap DEE, Sign-sign least -mean-squares (SSLMS) algorithm is used for not only the DFE but also the CTLE adaptation to reduce power consumption and extra hardware. An un-even data level is proposed for the optimum locking of the adaptation in the presence of a pre cursor. The receiver achieves BER of 10-12 at 34dB loss channel, occupies 0.174mm2, and consumes 37.2mW at 10.8Gb/s.-
dc.language영어-
dc.publisherIEEE-
dc.titleA 0.1 1.62-to-10.8Gb/s Video interface Receiver with Fully Adaptive Equalization Using Un-Even Data Level-
dc.typeArticle-
dc.citation.journaltitle2019 SYMPOSIUM ON VLSI CIRCUITS-
dc.identifier.wosid000531736500068-
dc.citation.endpageC199-
dc.citation.startpageC198-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorJeong, Deog-Kyoon-
dc.type.docTypeProceedings Paper-
dc.description.journalClass1-
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