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Cell Division: Weight Bit-Width Reduction Technique for Convolutional Neural Network Hardware Accelerators
Cited 3 time in
Web of Science
Cited 3 time in Scopus
- Authors
- Issue Date
- 2019-01
- Publisher
- ASSOC COMPUTING MACHINERY
- Citation
- 24TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2019), pp.286-291
- Abstract
- The datapath bit-width of hardware accelerators for convolutional neural network (CNN) inference is generally chosen to be wide enough, so that they can be used to process upcoming unknown CNNs. Herewe introduce the cell division technique, which is a variant of function-preserving transformations. With this technique, it is guaranteed that CNNs that have weights quantized to fixed-point format of arbitrary bit-widths, can be transformed to CNNs with less bit-widths of weights without any accuracy drop (or any accuracy change). As a result, CNN hardware accelerators are released from the weight bit-width constraint, which has been preventing them from having narrower datapaths. In addition, CNNs that have wider weight bit-widths than those assumed by a CNN hardware accelerator can be executed on the accelerator. Experimental results on LeNet-300-100, LeNet-5, AlexNet, and VGG-16 show that weights can be reduced down to 2-5 bits with 2.5x-5.2x decrease in weight storage requirement and of course without any accuracy drop.
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