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Switching Voltage Analysis of Nanoelectromechanical Memory Switches for Monolithic 3-D CMOS-NEM Hybrid Reconfigurable Logic Circuits

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dc.contributor.authorLee, Ho Moon-
dc.contributor.authorJo, Hyun Chan-
dc.contributor.authorKwon, Hyug Su-
dc.contributor.authorChoi, Woo Young-
dc.date.accessioned2022-10-26T07:21:15Z-
dc.date.available2022-10-26T07:21:15Z-
dc.date.created2022-10-20-
dc.date.issued2018-09-
dc.identifier.citationIEEE Transactions on Electron Devices, Vol.65 No.9, pp.3780-3785-
dc.identifier.issn0018-9383-
dc.identifier.urihttps://hdl.handle.net/10371/186764-
dc.description.abstractThe accurate calculation of switching voltage (V-s) is necessary for the reliable and low-power operation of monolithic 3-D (M3D) CMOS-nanoelectromechanical (NEM) hybrid reconfigurable logic circuits because V-s corresponds to the operating voltage (V-dd) of NEM memory switches. In this paper, based on the Euler-Bernoulli equation, the physics-based analytical model is proposed to determine V-s. The accuracy of the proposed model is verified by both the finite-element analysis and experimental results. Our proposed model shows >3% error compared with experimental data. Also, the design guidelines of NEM memory switches are presented in terms of minimum V-s (V-s_(m)) and device dimensions.-
dc.language영어-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleSwitching Voltage Analysis of Nanoelectromechanical Memory Switches for Monolithic 3-D CMOS-NEM Hybrid Reconfigurable Logic Circuits-
dc.typeArticle-
dc.identifier.doi10.1109/TED.2018.2858775-
dc.citation.journaltitleIEEE Transactions on Electron Devices-
dc.identifier.wosid000442357000027-
dc.identifier.scopusid2-s2.0-85050971581-
dc.citation.endpage3785-
dc.citation.number9-
dc.citation.startpage3780-
dc.citation.volume65-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorChoi, Woo Young-
dc.type.docTypeArticle-
dc.description.journalClass1-
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