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On-current Modeling of 70-nm PMOSFETs Dependent on Hot-carrier Stress Bias Conditions
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Woo Young | - |
dc.contributor.author | Lim, In Eui | - |
dc.contributor.author | Jhon, Heesauk | - |
dc.contributor.author | Yoon, Gyuhan | - |
dc.date.accessioned | 2022-10-26T07:21:17Z | - |
dc.date.available | 2022-10-26T07:21:17Z | - |
dc.date.created | 2022-10-20 | - |
dc.date.issued | 2018-04 | - |
dc.identifier.citation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, Vol.18 No.2, pp.131-138 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | https://hdl.handle.net/10371/186767 | - |
dc.description.abstract | Based on the drain-avalanche-hot-carrier (DAHC-) mechanism, a stress-bias-dependent on-current model is proposed for 70-nm p-channel metal-oxide-semiconductor field-effect transistors (PMOSFETs) by using only one device parameter: channel length variation (Delta L-ch). The proposed model describes the influence of drain and gate stress bias on the on-current of PMOSFETs successfully. It is a simple and effective method of predicting the on-current variation for more reliable circuit operation. | - |
dc.language | 영어 | - |
dc.publisher | 대한전자공학회 | - |
dc.title | On-current Modeling of 70-nm PMOSFETs Dependent on Hot-carrier Stress Bias Conditions | - |
dc.type | Article | - |
dc.identifier.doi | 10.5573/JSTS.2018.18.2.131 | - |
dc.citation.journaltitle | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.identifier.wosid | 000432340100002 | - |
dc.identifier.scopusid | 2-s2.0-85046414656 | - |
dc.citation.endpage | 138 | - |
dc.citation.number | 2 | - |
dc.citation.startpage | 131 | - |
dc.citation.volume | 18 | - |
dc.identifier.kciid | ART002338816 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Choi, Woo Young | - |
dc.type.docType | Article; Proceedings Paper | - |
dc.description.journalClass | 1 | - |
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