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Characteristics of Gate-All-Around Hetero-Gate-Dielectric Tunneling Field-Effect Transistors

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dc.contributor.authorLee, Jae Sung-
dc.contributor.authorChoi, Woo Young-
dc.contributor.authorKang, In Man-
dc.date.accessioned2022-10-26T07:21:49Z-
dc.date.available2022-10-26T07:21:49Z-
dc.date.created2022-10-20-
dc.date.issued2012-06-
dc.identifier.citationJapanese Journal of Applied Physics, Vol.51 No.6S, p. 06FE03-
dc.identifier.issn0021-4922-
dc.identifier.urihttps://hdl.handle.net/10371/186812-
dc.description.abstractIn this paper, gate-all-around (GAA) tunneling field-effect transistors (TFETs) with hetero-gate dielectric (HG) materials have been simulated and their characteristics have been optimized as a function of the high-k dielectric length (Lhigh-k). For the optimization of Lhigh-k, simulation results have been analyzed in terms of on-and off-current (I-on, I-off), subthreshold swing (SS), on/off current ratio, intrinsic delay time (tau), and RF performances. In the device simulations, the on-current characteristics were optimized when Lhigh-k is 8 nm. The optimized GAA HG TFET had similar to 100 times higher I-on and similar to 2 times improved SS than a GAA SiO2-only TFET. It has also been shown that the RF performances of TFETs can be improved by introducing an HG structure. (C) 2012 The Japan Society of Applied Physics-
dc.language영어-
dc.publisherIOP Publishing Ltd-
dc.titleCharacteristics of Gate-All-Around Hetero-Gate-Dielectric Tunneling Field-Effect Transistors-
dc.typeArticle-
dc.identifier.doi10.1143/JJAP.51.06FE03-
dc.citation.journaltitleJapanese Journal of Applied Physics-
dc.identifier.wosid000306189800050-
dc.identifier.scopusid2-s2.0-84863306032-
dc.citation.number6S-
dc.citation.startpage06FE03-
dc.citation.volume51-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorChoi, Woo Young-
dc.type.docTypeArticle-
dc.description.journalClass1-
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