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Island-Style Monolithic Three-Dimensional CMOS-Nanoelectromechanical Logic Circuits

Cited 7 time in Web of Science Cited 9 time in Scopus
Authors

Kwon, Hyug Su; Ko, Ji Wang; Choi, Woo Young

Issue Date
2020-08
Publisher
Institute of Electrical and Electronics Engineers
Citation
IEEE Electron Device Letters, Vol.41 No.8, pp.1257-1260
Abstract
Island-style monolithic three-dimensional (M3D) CMOS- nanoelectromechanical (CMOS-NEM) reconfigurable logic (RL) circuits are experimentally demonstrated showing the full operation of the island-style RL: single-tile and tile-to-tile operation. For the fabrication of M3D CMOS-NEM RL circuits, 65-nm CMOS baseline process was used, in which copper NEM memory switches are integrated over the CMOS logic circuits by using dual damascene process. It is predicted that our proposed M3D CMOS-NEM RL circuits will exhibit 4.6x higher chip density, 2.3x higher operation frequency and 9.3x lower power consumption than CMOS-only ones (tri-state buffer case) for tile-to-tile operation.
ISSN
0741-3106
URI
https://hdl.handle.net/10371/186910
DOI
https://doi.org/10.1109/LED.2020.3001362
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