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Design guideline of tunnel field-effect transistors (TFETs) considering negative differential transconductance (NDT)
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Jang Woo | - |
| dc.contributor.author | Choi, Woo Young | - |
| dc.date.accessioned | 2022-10-26T07:23:01Z | - |
| dc.date.available | 2022-10-26T07:23:01Z | - |
| dc.date.created | 2022-10-19 | - |
| dc.date.issued | 2020-01 | - |
| dc.identifier.citation | Solid-State Electronics, Vol.163, p. 107659 | - |
| dc.identifier.issn | 0038-1101 | - |
| dc.identifier.uri | https://hdl.handle.net/10371/186915 | - |
| dc.description.abstract | A gate-normal tunnel field-effect transistor (TFET) showing negative differential transconductance (NDT) and its design guideline are proposed. The introduction of the source depletion to the gate-normal TFETs leads to negative differential transconductance. It is also confirmed that the NDT of the proposed gate-normal TFET is successfully enhanced by modulating gate-induced source depletion effects. | - |
| dc.language | 영어 | - |
| dc.publisher | Pergamon Press Ltd. | - |
| dc.title | Design guideline of tunnel field-effect transistors (TFETs) considering negative differential transconductance (NDT) | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1016/j.sse.2019.107659 | - |
| dc.citation.journaltitle | Solid-State Electronics | - |
| dc.identifier.wosid | 000496807500014 | - |
| dc.identifier.scopusid | 2-s2.0-85072274702 | - |
| dc.citation.startpage | 107659 | - |
| dc.citation.volume | 163 | - |
| dc.description.isOpenAccess | N | - |
| dc.contributor.affiliatedAuthor | Choi, Woo Young | - |
| dc.type.docType | Article; Proceedings Paper | - |
| dc.description.journalClass | 1 | - |
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