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Superconductor Computing for Neural Networks
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ishida, Koki | - |
dc.contributor.author | Byun, Ilkwon | - |
dc.contributor.author | Nagaoka, Ikki | - |
dc.contributor.author | Fukumitsu, Kosuke | - |
dc.contributor.author | Tanaka, Masamitsu | - |
dc.contributor.author | Kawakami, Satoshi | - |
dc.contributor.author | Tanimoto, Teruo | - |
dc.contributor.author | Ono, Takatsugu | - |
dc.contributor.author | Kim, Jangwoo | - |
dc.contributor.author | Inoue, Koji | - |
dc.date.accessioned | 2023-09-25T05:52:45Z | - |
dc.date.available | 2023-09-25T05:52:45Z | - |
dc.date.created | 2021-06-15 | - |
dc.date.created | 2021-06-15 | - |
dc.date.created | 2021-06-15 | - |
dc.date.issued | 2021-05 | - |
dc.identifier.citation | IEEE Micro, Vol.41 No.3, pp.19-26 | - |
dc.identifier.issn | 0272-1732 | - |
dc.identifier.uri | https://hdl.handle.net/10371/195625 | - |
dc.description.abstract | The superconductor single-flux-quantum (SFQ) logic family has been recognized as a promising solution for the post-Moore era, thanks to the ultrafast and low-power switching characteristics of superconductor devices. Researchers have made tremendous efforts in various aspects, especially in device and circuit design. However, there has been little progress in designing a convincing SFQ-based architectural unit due to a lack of understanding about its potentials and limitations at the architectural level. This article provides the design principles for SFQ-based architectural units with an extremely high-performance neural processing unit (NPU). To achieve our goal, we developed and validated a simulation framework to identify critical architectural bottlenecks in designing a performance-effective SFQ-based NPU. We propose SuperNPU, which outperforms a conventional state-of-the-art NPU by 23 times in terms of computing performance and 1.23 times in power efficiency even with the cooling cost of the 4K environment. | - |
dc.language | 영어 | - |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.title | Superconductor Computing for Neural Networks | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/MM.2021.3070488 | - |
dc.citation.journaltitle | IEEE Micro | - |
dc.identifier.wosid | 000655552800004 | - |
dc.identifier.scopusid | 2-s2.0-85103891608 | - |
dc.citation.endpage | 26 | - |
dc.citation.number | 3 | - |
dc.citation.startpage | 19 | - |
dc.citation.volume | 41 | - |
dc.description.isOpenAccess | Y | - |
dc.contributor.affiliatedAuthor | Kim, Jangwoo | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
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