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Making a Better Use of Caches for GCN Accelerators with Feature Slicing and Automatic Tile Morphing
Cited 2 time in
Web of Science
Cited 3 time in Scopus
- Authors
- Issue Date
- 2021-07
- Publisher
- IEEE COMPUTER SOC
- Citation
- IEEE COMPUTER ARCHITECTURE LETTERS, Vol.20 No.2, pp.102-105
- Abstract
- GCNs (Graph Convolutional Networks) are becoming increasingly popular in the field of neural networks due to their ability to analyze many kinds of irregular data. Along with the rapid growth, there are various accelerators being proposed to mitigate the huge computational requirements. Often, the key bottleneck of executing GCNs is at the random accesses posed on the wide feature array. Vertex tiling is a popular technique to address the issue, but has a drawback of putting too much repetition on the data and being hard to tune parameters. In such regard, we propose feature slicing and automatic tile morphing, which greatly improves the cache behavior, and allows for easier tuning. Experimental results show that the proposed methods provide up to 40.1 percent overall execution time reduction, and automatically finds near-optimal tuning parameters.
- ISSN
- 1556-6056
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Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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