Publications

Detailed Information

Making a Better Use of Caches for GCN Accelerators with Feature Slicing and Automatic Tile Morphing

Cited 2 time in Web of Science Cited 3 time in Scopus
Authors

Yoo, Mingi; Song, Jaeyong; Lee, Jounghoo; Kim, Namhyung; Kim, Youngsok; Lee, Jinho

Issue Date
2021-07
Publisher
IEEE COMPUTER SOC
Citation
IEEE COMPUTER ARCHITECTURE LETTERS, Vol.20 No.2, pp.102-105
Abstract
GCNs (Graph Convolutional Networks) are becoming increasingly popular in the field of neural networks due to their ability to analyze many kinds of irregular data. Along with the rapid growth, there are various accelerators being proposed to mitigate the huge computational requirements. Often, the key bottleneck of executing GCNs is at the random accesses posed on the wide feature array. Vertex tiling is a popular technique to address the issue, but has a drawback of putting too much repetition on the data and being hard to tune parameters. In such regard, we propose feature slicing and automatic tile morphing, which greatly improves the cache behavior, and allows for easier tuning. Experimental results show that the proposed methods provide up to 40.1 percent overall execution time reduction, and automatically finds near-optimal tuning parameters.
ISSN
1556-6056
URI
https://hdl.handle.net/10371/199362
DOI
https://doi.org/10.1109/LCA.2021.3090954
Files in This Item:
There are no files associated with this item.
Appears in Collections:

Related Researcher

  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area AI Accelerators, Distributed Deep Learning, Neural Architecture Search

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share