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A 170MHz-Lock-In-Range and-253dB-FoM<sub>jitter</sub>, 12-to-14.5GHz Subsampling PLL with a 150μW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lim, Younghyun | - |
| dc.contributor.author | Kim, Juyeop | - |
| dc.contributor.author | Jo, Yongwoo | - |
| dc.contributor.author | Bang, Jooeun | - |
| dc.contributor.author | Yoo, Seyeon | - |
| dc.contributor.author | Park, Hangi | - |
| dc.contributor.author | Yoon, Heein | - |
| dc.contributor.author | Choi, Jaehyouk | - |
| dc.date.accessioned | 2024-04-25T04:10:00Z | - |
| dc.date.available | 2024-04-25T04:10:00Z | - |
| dc.date.created | 2024-04-25 | - |
| dc.date.issued | 2020 | - |
| dc.identifier.citation | 2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC), pp.280-+ | - |
| dc.identifier.issn | 0193-6530 | - |
| dc.identifier.uri | https://hdl.handle.net/10371/199390 | - |
| dc.language | 영어 | - |
| dc.publisher | IEEE | - |
| dc.title | A 170MHz-Lock-In-Range and-253dB-FoMjitter, 12-to-14.5GHz Subsampling PLL with a 150μW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator | - |
| dc.type | Article | - |
| dc.citation.journaltitle | 2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC) | - |
| dc.identifier.wosid | 000570129800109 | - |
| dc.identifier.scopusid | 2-s2.0-85083827488 | - |
| dc.citation.endpage | + | - |
| dc.citation.startpage | 280 | - |
| dc.description.isOpenAccess | N | - |
| dc.contributor.affiliatedAuthor | Choi, Jaehyouk | - |
| dc.type.docType | Proceedings Paper | - |
| dc.description.journalClass | 1 | - |
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- College of Engineering
- Department of Electrical and Computer Engineering
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