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High-resolution offset-frequency PLL using properties of co-prime numbers
Cited 1 time in
Web of Science
Cited 2 time in Scopus
- Authors
- Issue Date
- 2012-11
- Publisher
- INST ENGINEERING TECHNOLOGY-IET
- Citation
- ELECTRONICS LETTERS, Vol.48 No.24, pp.1522-U10
- Abstract
- A new offset-frequency phase-locked loop (PLL) that realises high-frequency resolution based on a mathematical relation between the output frequency and the offset frequency is proposed. The proposed PLL achieved a 0.1 MHz frequency resolution while using a 1.1 MHz reference clock. The PLL consisted of a main PLL, a delay-locked loop based programmable frequency multiplier, and a single-sideband mixer. The prototype PLL was fabricated with a 0.18 mu m CMOS technology, and occupies a 0.29 mm(2) active silicon area.
- ISSN
- 0013-5194
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- There are no files associated with this item.
Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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