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A 45nm SOI-CMOS PLL with a Wideband LC-VCO
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Kun-Seok | - |
dc.contributor.author | Beck, Sungho | - |
dc.contributor.author | Jeon, Hamhee | - |
dc.contributor.author | Yoon, Youngchang | - |
dc.contributor.author | Choi, Jaehyouk | - |
dc.contributor.author | Lee, Chang-Ho | - |
dc.contributor.author | Kenney, J. Stevenson | - |
dc.date.accessioned | 2024-04-25T04:12:54Z | - |
dc.date.available | 2024-04-25T04:12:54Z | - |
dc.date.created | 2024-04-25 | - |
dc.date.issued | 2011 | - |
dc.identifier.citation | 2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | - |
dc.identifier.issn | 1548-3746 | - |
dc.identifier.uri | https://hdl.handle.net/10371/199446 | - |
dc.description.abstract | A 45nm SOI-CMOS PLL with a wideband LC-VCO is presented. The proposed PLL uses the advantage of SOI technology such as small parasitic capacitance and high Q-factor. The frequency range of the PLL is maximized because of a high maximum-to-minimum capacitance ratio of a capacitor bank. Measurement results show that the VCO generates 4.87-to-9.65GHz frequency signals with 65.8% frequency coverage. Fabricated chip occupies 0.09mm2 of active area and consumes less than 7mA current from single 1.0V supply. | - |
dc.language | 영어 | - |
dc.publisher | IEEE | - |
dc.title | A 45nm SOI-CMOS PLL with a Wideband LC-VCO | - |
dc.type | Article | - |
dc.citation.journaltitle | 2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | - |
dc.identifier.wosid | 000296057200011 | - |
dc.identifier.scopusid | 2-s2.0-80053650043 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Choi, Jaehyouk | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
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- College of Engineering
- Department of Electrical and Computer Engineering
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