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300-GHz Double-Balanced Up-Converter Using Asymmetric MOS Varactors in 65-nm CMOS
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Cited 6 time in Scopus
- Authors
- Issue Date
- 2022-08
- Citation
- IEEE Journal of Solid-State Circuits, Vol.57 No.8, pp.2336-2347
- Abstract
- A 270-300-GHz double-balanced up-converter fabricated in 65-nm CMOS is presented. The up- converter is the first to employ accumulation mode MOS asymmetric varactors (ASVARs) as mixing devices. A power-splitting-transformer hybrid is utilized to improve differential signal isolation. The up-converter achieves the maximum conversion gain (CG) of -11.2 dB and the output 1-dB compression point (OP1dB) of -6.2 dBm including the losses of input and output baluns added for measurements. The maximum CG and OP1dB are the highest among up-converters operating near 300 GHz in CMOS and III-V transistors. The 3-dB bandwidth of CG is similar to 25 GHz, which makes the up-converter suitable for high data-rate communication.
- ISSN
- 0018-9200
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Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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