Publications
Detailed Information
A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset Cancellation and Slack-Borrowing Logic
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jiang, Rucheng | - |
dc.contributor.author | Wu, Han | - |
dc.contributor.author | Ng, Kian Ann | - |
dc.contributor.author | Tsai, Chne-Wuen | - |
dc.contributor.author | Yoo, Jerald | - |
dc.date.accessioned | 2024-05-03T04:30:23Z | - |
dc.date.available | 2024-05-03T04:30:23Z | - |
dc.date.created | 2024-05-02 | - |
dc.date.issued | 2023 | - |
dc.identifier.citation | European Solid-State Circuits Conference, Vol.2023-September, pp.281-284 | - |
dc.identifier.issn | 1930-8833 | - |
dc.identifier.uri | https://hdl.handle.net/10371/200775 | - |
dc.description.abstract | This paper presents an energy and area-efficient successive approximation register (SAR)-assisted cyclic analog-to-digital converter (ADC) architecture. The proposed hybrid ADC combines a 2-bit/cycle cyclic ADC with a slack-borrowing coarse SAR ADC. The proposed multiply-by-one cyclic ADC achieves low-power and 2-bit/cycle operation without any extra hardware cost. The simultaneous amplifier and comparator offset cancellation mitigates the 2nd-stage cyclic ADC offset. Clocked at 70MS/s, the proposed ADC consumes 0.88mW, yielding FoMS and FoMW of 175dB and 6.9fJ/conv, respectively. | - |
dc.language | 영어 | - |
dc.publisher | European Solid-State Circuits Conference | - |
dc.title | A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset Cancellation and Slack-Borrowing Logic | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/ESSCIRC59616.2023.10268690 | - |
dc.citation.journaltitle | European Solid-State Circuits Conference | - |
dc.identifier.wosid | 001088613100071 | - |
dc.identifier.scopusid | 2-s2.0-85175261358 | - |
dc.citation.endpage | 284 | - |
dc.citation.startpage | 281 | - |
dc.citation.volume | 2023-September | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Yoo, Jerald | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.subject.keywordAuthor | 2-bit/cycle Cyclic ADC | - |
dc.subject.keywordAuthor | offset cancellation | - |
dc.subject.keywordAuthor | slack borrowing | - |
dc.subject.keywordAuthor | SAR-assisted Cyclic ADC | - |
- Appears in Collections:
- Files in This Item:
- There are no files associated with this item.
Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
Item View & Download Count
Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.