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A 16-channel, 1-Second Latency Patient-Specific Seizure Onset and Termination Detection Processor with Dual Detector Architecture and Digital Hysteresis
Cited 4 time in
Web of Science
Cited 10 time in Scopus
- Authors
- Issue Date
- 2015
- Publisher
- IEEE
- Citation
- 2015 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)
- Abstract
- This paper presents an area-power-efficient 16 channel seizure onset and termination detection processor with patient-specific machine learning techniques. This is the first work in literature to report an on-chip classification to detect both start and end of seizure event simultaneously with high accuracy. Frequency-Time Division Multiplexing (FTDM) filter architecture and Dual-Detector Architecture (D(2)A) is proposed, implemented and verified. The D(2)A incorporates two area efficient Linear Support Vector Machine (LSVM) classifiers along with digital hysteresis to achieve a high sensitivity and specificity of 95.7% and 98%, respectively, using CHB-MIT EEG database [1], with a small latency of is. The overall energy efficiency is measured as 1.85 mu J/Classification at 16-channel mode.
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Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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