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An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor

Cited 183 time in Web of Science Cited 229 time in Scopus

Yoo, Jerald; Yan, Long; El-Damak, Dina; Bin Altaf, Muhammad Awais; Shoeb, Ali H.; Chandrakasan, Anantha P.

Issue Date
Institute of Electrical and Electronics Engineers
IEEE Journal of Solid-State Circuits, Vol.48 No.1, pp.214-228
An 8-channel scalable EEG acquisition SoC is presented to continuously detect and record patient-specific seizure onset activities from scalp EEG. The SoC integrates 8 high-dynamic range Analog Front-End (AFE) channels, a machine-learning seizure classification processor and a 64 KB SRAM. The classification processor exploits the Distributed Quad-LUT filter architecture to minimize the area while also minimizing the overhead in power x delay. The AFE employs a Chopper-Stabilized Capacitive Coupled Instrumentation Amplifier to show NEF of 5.1 and noise RTI of 0.91 mu V-rms for 0.5-100 Hz bandwidth. The classification processor adopts a support-vector machine as a classifier, with a GBW controller that gives real-time gain and bandwidth feedback to AFE to maintain accuracy. The SoC is verified with the Children's Hospital Boston-MIT EEG database as well as with rapid eye blink pattern detection test. The SoC is implemented in 0.18 mu m 1P6M CMOS process occupying 25 mm(2), and it shows an accuracy of 84.4% in eye blink classification test, at 2.03 mu J/classification energy efficiency. The 64 KB on chip memory can store up to 120 seconds of raw EEG data.
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Yoo, Jerald유담
  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area Biomedical Applications, Energy-Efficient Integrated Circuits


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