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An embedded 8-bit RISC controller for yield enhancement of the 90-nm PRAM
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Hyejung | - |
dc.contributor.author | Sohn, Kyornin | - |
dc.contributor.author | Yoo, Jerald | - |
dc.contributor.author | Yoo, Hoi-Jun | - |
dc.date.accessioned | 2024-05-03T04:36:23Z | - |
dc.date.available | 2024-05-03T04:36:23Z | - |
dc.date.created | 2024-05-02 | - |
dc.date.issued | 2007-09 | - |
dc.identifier.citation | PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE, p. 4405847 | - |
dc.identifier.uri | https://hdl.handle.net/10371/200872 | - |
dc.description.abstract | An embedded 8b RISC for advanced memories is designed to control, analyze and optimize the memory timing and voltage parameters. The processor-based built-in-self-optimize (BISO) algorithm is proposed to enhance the memory yield. A test PRAM with the RISC is fabricated in 90nm, 3-metal diode-switch process. By applying BISO, the PRAM margin window increases by 221%. It operates at 100MHz and consumes 28.4mW at 1.0V supply voltage. The embedded RISC enables 100Mb/s/pin read/write throughputs to PRAM. | - |
dc.language | 영어 | - |
dc.publisher | IEEE | - |
dc.title | An embedded 8-bit RISC controller for yield enhancement of the 90-nm PRAM | - |
dc.type | Article | - |
dc.citation.journaltitle | PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE | - |
dc.identifier.wosid | 000252233200179 | - |
dc.identifier.scopusid | 2-s2.0-39549086042 | - |
dc.citation.startpage | 4405847 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Yoo, Jerald | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
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- College of Engineering
- Department of Electrical and Computer Engineering
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