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Processor-based built-in self-optimizer for 90nm diode-switch PRAM
Cited 1 time in
Web of Science
Cited 3 time in Scopus
- Authors
- Issue Date
- 2007
- Publisher
- JAPAN SOCIETY APPLIED PHYSICS
- Citation
- 2007 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, pp.184-185
- Abstract
- A PR-AM includes 8b embedded RISC to generate the optimized internal timimg and voltage parameters to control the variations of the cell resistances. The PRAM blocks with small margin window of cell resistances are detected, analyzed and controlled by processor-based built-in self-optimizer (BISO). A 4Mb test PRAM is fabricated in a 90nm 3-metal diode-switch PRAM cell technology. Measured margin increases by up to 221%.
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Related Researcher
- Yoo, Jerald유담
- 부교수
- College of Engineering
- Department of Electrical and Computer Engineering
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