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Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Li, Huaicheng | - |
dc.contributor.author | Putra, Martin L. | - |
dc.contributor.author | Shi, Ronald | - |
dc.contributor.author | Kurnia, Fadhil, I | - |
dc.contributor.author | Lin, Xing | - |
dc.contributor.author | Do, Jae Young | - |
dc.contributor.author | Kistijantoro, Achmad Imam | - |
dc.contributor.author | Ganger, Gregory R. | - |
dc.contributor.author | Gunawi, Haryadi S. | - |
dc.date.accessioned | 2024-05-09T06:42:09Z | - |
dc.date.available | 2024-05-09T06:42:09Z | - |
dc.date.created | 2024-05-09 | - |
dc.date.issued | 2023-02 | - |
dc.identifier.citation | ACM Transactions on Storage, Vol.19 No.1, p. 5 | - |
dc.identifier.issn | 1553-3077 | - |
dc.identifier.uri | https://hdl.handle.net/10371/201361 | - |
dc.description.abstract | Predictable latency on flash storage is a long-pursuit goal, yet unpredictability stays due to the unavoidable disturbance from many well-known SSD internal activities. To combat this issue, the recent NVMe IO Determinism (IOD) interface advocates host-level controls to SSD internalmanagement tasks. Although promising, challenges remain on how to exploit it for truly predictable performance. We present IODA,1 an I/O deterministic flash array design built on top of small but powerful extensions to the IOD interface for easy deployment. IODA exploits data redundancy in the context of IOD for a strong latency predictability contract. In IODA, SSDs are expected to quickly fail an I/O on purpose to allowpredictable I/Os through proactive data reconstruction. In the case of concurrent internal operations, IODA introduces busy remaining time exposure and predictable-latency-window formulation to guarantee predictable data reconstructions. Overall, IODA only adds five new fields to the NVMe interface and a small modification in the flash firmware while keeping most of the complexity in the host OS. Our evaluation shows that IODA improves the 95-99.99th latencies by up to 75x. IODA is also the nearest to the ideal, no disturbance case compared to seven state-of-the-art preemption, suspension, GC coordination, partitioning, tiny-tail flash controller, prediction, and proactive approaches. | - |
dc.language | 영어 | - |
dc.publisher | Association for Computing Machinary, Inc. | - |
dc.title | Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays | - |
dc.type | Article | - |
dc.identifier.doi | 10.1145/3568427 | - |
dc.citation.journaltitle | ACM Transactions on Storage | - |
dc.identifier.wosid | 000939530200005 | - |
dc.identifier.scopusid | 2-s2.0-85149441435 | - |
dc.citation.number | 1 | - |
dc.citation.startpage | 5 | - |
dc.citation.volume | 19 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Do, Jae Young | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.subject.keywordPlus | MEMORY | - |
dc.subject.keywordAuthor | Software/hardware co-design | - |
dc.subject.keywordAuthor | predictable latency | - |
dc.subject.keywordAuthor | SSD | - |
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- College of Engineering
- Department of Electrical and Computer Engineering
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