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Area-Selective Atomic Layer Deposition Using Si Precursors as Inhibitors

Cited 76 time in Web of Science Cited 82 time in Scopus
Authors

Khan, Rizwan; Shong, Bonggeun; Ko, Byeong Guk; Lee, Jae Kwang; Lee, Hyunsoo; Park, Jeong Young; Oh, Il-Kwon; Raya, Shimeles Shumi; Hong, Hyun Min; Chung, Kwun-Bum; Luber, Erik J.; Kim, Yoon-Seok; Lee, Chul-Ho; Kim, Woo-Hee; Lee, Han-Bo-Ram

Issue Date
2018-11
Publisher
American Chemical Society
Citation
Chemistry of Materials, Vol.30 No.21, pp.7603-7610
Abstract
Short-chain aminosilanes, namely, bis(N,N-dimethylamino)dimethylsilane (DMADMS) and (N,N-dimethylamino)trimethylsilane (DMATMS), have been used as Si precursors for atomic layer deposition (ALD) of SiO2. In this work, the DMADMS and DMATMS Si precursors are utilized as inhibitors for area-selective ALD (AS-ALD). The inhibitors selectively adsorb on a SiO2 surface but not on H-Si, so that SiO2 becomes selectively deactivated toward subsequent ALD. The deactivation of the SiO2 surface by the inhibitors was investigated using various experimental and theoretical methods, including surface potential measurements, spectroscopic ellipsometry, and X-ray photoelectron spectroscopy. Better inhibition was observed for ALD of Ru and Pt than for ALD of Al2O3 and HfO2. Through quantum mechanical and stochastic simulations, the difference in the blocking ability for noble metal and metal oxide ALD by the aminosilane inhibitors could be attributed to the inherently partial surface coverage by the inhibitors at their saturation and the reactivity of the subsequent ALD precursors. As silane inhibitors can be easily integrated with vacuum-based processes to facilitate high volume manufacturing of upcoming electronic devices, the current study provides a potential approach for the utilization of AS-ALD in pattern fabrication inside 3D nanostructures.
ISSN
0897-4756
URI
https://hdl.handle.net/10371/202257
DOI
https://doi.org/10.1021/acs.chemmater.8b02774
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  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area 2차원 반도체 소자 및 재료, High-Performance 2D Electronics, Low-Power 2D Electronics, 뉴로모픽 소자 및 응용기술, 저전력 소자 및 소자물리

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