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Synaptic Barristor Based on Phase-Engineered 2D Heterostructures

Cited 136 time in Web of Science Cited 138 time in Scopus

Huh, Woong; Jang, Seonghoon; Lee, Jae Yoon; Lee, Donghun; Lee, Donghun; Lee, Jung Min; Park, Hong-Gyu; Kim, Jong Chan; Jeong, Hu Young; Wang, Gunuk; Lee, Chul-Ho

Issue Date
WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
Advanced Materials, Vol.30 No.35, p. 1801447
The development of energy-efficient artificial synapses capable of manifoldly tuning synaptic activities can provide a significant breakthrough toward novel neuromorphic computing technology. Here, a new class of artificial synaptic architecture, a three-terminal device consisting of a vertically integrated monolithic tungsten oxide memristor, and a variable-barrier tungsten selenide/graphene Schottky diode, termed as a 'synaptic barrister,' are reported. The device can implement essential synaptic characteristics, such as short-term plasticity, long-term plasticity, and paired-pulse facilitation. Owing to the electrostatically controlled barrier height in the ultrathin van der Waals heterostructure, the device exhibits gate-controlled memristive switching characteristics with tunable programming voltages of 0.2-0.5 V. Notably, by electrostatic tuning with a gate terminal, it can additionally regulate the degree and tuning rate of the synaptic weight independent of the programming impulses from source and drain terminals. Such gate tunability cannot be accomplished by previously reported synaptic devices such as memristors and synaptic transistors only mimicking the two-neuronal-based synapse. These capabilities eventually enable the accelerated consolidation and conversion of synaptic plasticity, functionally analogous to the synapse with an additional neuromodulator in biological neural networks.
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  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area 2차원 반도체 소자 및 재료, High-Performance 2D Electronics, Low-Power 2D Electronics, 뉴로모픽 소자 및 응용기술, 저전력 소자 및 소자물리


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