Publications

Detailed Information

A Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving-64 dBc Reference-Spur and-239 dB FoM

DC Field Value Language
dc.contributor.authorShin, Jiwon-
dc.contributor.authorSong, Joonghyun-
dc.contributor.authorKim, Jihee-
dc.contributor.authorChoi, Woo-Seok-
dc.date.accessioned2024-05-16T01:21:19Z-
dc.date.available2024-05-16T01:21:19Z-
dc.date.created2023-11-13-
dc.date.created2023-11-13-
dc.date.created2023-11-13-
dc.date.issued2023-09-
dc.identifier.citationEuropean Solid-State Circuits Conference, Vol.2023-September, pp.273-276-
dc.identifier.issn1930-8833-
dc.identifier.urihttps://hdl.handle.net/10371/202450-
dc.description.abstractA near-threshold ring-oscillator (RO)-based injection-locked clock multiplier (ILCM) with a novel error detection scheme is presented. The proposed ILCM employs a robust calibrator with reduced delay range and low-frequency operation, effectively suppressing the phase noise of the RO despite low-voltage operation. This leads to exceptional jitter performance while occupying a minimal area. Moreover, by eliminating the pulse distortion impact from the frequency detector, precise frequency tracking is achieved and deterministic jitter is effectively suppressed. The prototype ILCM is fabricated in a 28nm CMOS process with an active area of 0.0097mm(2). It generates output clocks of 1GHz and 300 MHz, operating at supply voltages of 0.5V and 0.4V, respectively. The integrated jitter is 2.50 psRMS and 10.7 psRMS for each voltage, and the reference spur is recorded at -64.0 dBc and -64.5 dBc, while achieving an FoM of -239 dB and -232 dB.-
dc.language영어-
dc.publisherEuropean Solid-State Circuits Conference-
dc.titleA Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving-64 dBc Reference-Spur and-239 dB FoM-
dc.typeArticle-
dc.identifier.doi10.1109/ESSCIRC59616.2023.10268709-
dc.citation.journaltitleEuropean Solid-State Circuits Conference-
dc.identifier.wosid001088613100069-
dc.identifier.scopusid2-s2.0-85175253460-
dc.citation.endpage276-
dc.citation.startpage273-
dc.citation.volume2023-September-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorChoi, Woo-Seok-
dc.type.docTypeProceedings Paper-
dc.description.journalClass1-
dc.subject.keywordAuthorInjection-locked clock multiplier (ILCM)-
dc.subject.keywordAuthornear-threshold operation-
dc.subject.keywordAuthorspur reduction-
dc.subject.keywordAuthorerror-tracking technique-
Appears in Collections:
Files in This Item:
There are no files associated with this item.

Related Researcher

  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area DRAM-PIM, High Bandwidth Memory Interface, O Links, Performance Modeling for I

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share