Detailed Information

Area and Power Efficient 10B6Q PAM-4 DC Balance Coder for Automotive Camera Link

Cited 2 time in Web of Science Cited 2 time in Scopus

Lee, Woonghee; Shim, Minkyo; Lee, Yunhee; Yang, Heejin; Shin, Soyeong; Choi, Woo Seok; Jeong, Deog-Kyoon

Issue Date
Institute of Electrical and Electronics Engineers
IEEE Transactions on Circuits and Systems II: Express Briefs, Vol.69 No.4, pp.2056-2060
We propose an area- and power-efficient four-level pulse amplitude modulation (PAM-4) encoder/decoder for an AC coupled link system that guarantees DC balance and limited run length. Configured as 10B6Q, input data of 10 bits are mapped to 5 quaternary symbols. One of four candidate codewords that have inverted symbols at predefined positions is selected that best satisfies the requirements of DC balance and the number of transitions. One quaternary symbol is added at the end to indicate which candidate codeword is selected. This coding scheme not only guarantees the PAM-4 DC balance but also increases transition density from 75% (PRBS) to 85.6% and limits the maximum run length down to six, thus facilitating timing recovery of the receiver. Although the input data width of 10 bits is used in this implementation, the proposed scheme can be extended to wider input data with higher coding efficiency. The proposed 10B6Q encoder is fabricated in the 40 nm CMOS technology and occupies an active area of 0.0009 mm(2) with a synthesized gate count of 645. It consumes 0.23 mW at the operating clock frequency of 667 MHz.
Files in This Item:
There are no files associated with this item.
Appears in Collections:

Related Researcher

  • College of Engineering
  • Department of Electrical and Computer Engineering
Research Area DRAM-PIM, High Bandwidth Memory Interface, O Links, Performance Modeling for I


Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.