A 15Gb/s 1.9pJ/bit sub-baud-rate digital CDR

Abstract

A sub-baud-rate CDR that can recover clock and data using only a quarter-rate clock is presented. Four data bits are recovered in each clock cycle using eight samplers and a current integrator. Four of the eight samplers used for data recovery are re-used for phase detection. Fabricated in a 65nm CMOS process and operating with 11dB channel loss, the prototype CDR recovers 15.2Gb/s data using a 3.8GHz clock and achieves BER < 10(-12), > 10MHz JTOL corner, 548fs(rms) recovered clock jitter, and 1.9pJ/bit energy efficiency.