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Design of Near-Threshold Injection-Locked Clock Multiplier : 유사문턱전압에서 동작하는 주입 동기 주파수 체배기의 설계

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Authors

신지원

Advisor
최우석
Issue Date
2023
Publisher
서울대학교 대학원
Keywords
Clock generatorfrequency synthesizerring oscillator based PLLinjection-locked clock multiplier (ILCM)reference spurerror-tracking technique
Description
학위논문(석사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2023. 2. 최우석.
Abstract
The RO-based injection-locked clock multiplier (ILCM) has garnered attention as a solution for power and area-sensitive clock generators due to its compact size and excellent energy efficiency. However, the degradation of reference spur in ILCMs presents a challenge for achieving great performance in low-voltage operations.
In this thesis, a RO-based near-threshold ILCM with an edge-selective error detector (ESED) is proposed. The ESED decouples the effect of pulse distortion, which causes reference spurs in ILCMs, from the frequency tracking path, enabling more accurate frequency tracking. Additionally, the ESED operates at a lower frequency compared to prior art, and employs a shared single detection path, resulting in significant reductions in power and area.
The proposed RO-based near-threshold ILCM is fabricated in a 28nm CMOS process and occupies an area of 0.0097mm2. It is measured at supply voltages of 0.4V and 0.5V, and generates output clocks of 300MHz and 1.00GHz, respectively. When the proposed ESED is activated, an integrated jitter of 11.7psRMS and 2.58psRMS and a reference spur of -62dBc and -54dBc are obtained, respectively, along with FoMs of -231dB and -239dB.
RO-based injection-locked clock multiplier (ILCM)은 작은 면적과 우수한 전력 효율로 인하여 배터리로 동작하는 시스템의 요구사항에 부합하는 특성을 갖는다. 그러나, ILCM에서 발생하는 높은 reference spur는 저전압에서 우수한 성능을 달성하는데 장애물로 작용하고 있다.
본 논문에서는 이러한 추세에 따라 RO 기반의 near-threshold ILCM을 설계하였으며, 저전압에서 열화되는 reference spur 성능을 개선하는 새로운 error detection scheme을 제안하였다. 이를 통해 error-tracking path 사이에 존재하던 correlation을 제거하였으며, reference spur를 효과적으로 제거할 수 있도록 설계하였다.
제안된 RO 기반의 near-threshold ILCM은 28nm CMOS 공정으로 제작되었으며, 0.0097mm2의 면적을 차지한다. 0.4V와 0.5V에서 측정되었으며, 각각 300MHz와 1.00GHz의 클럭을 생성하였다. 제안된 error detector가 활성화 되었을 때 11.7psRMS와 2.58psRMS 의 integrated jitter와 -62dBc, -54dBc의 reference spur가 발생하였으며, 각각 -231dB, -239dB의 FoM을 달성하였다.
Language
eng
URI
https://hdl.handle.net/10371/203988

https://dcollection.snu.ac.kr/common/orgView/000000176384
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