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A Fine-grained Parallel Snappy Decompressor for FPGAs Using a Relaxed Execution Model

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dc.contributor.authorFang, Jian-
dc.contributor.authorChen, Jianyu-
dc.contributor.authorLee, Jinho-
dc.contributor.authorAl-Ars, Zaid-
dc.contributor.authorHofstee, H. Peter-
dc.date.accessioned2024-07-24T01:09:49Z-
dc.date.available2024-07-24T01:09:49Z-
dc.date.created2024-07-22-
dc.date.issued2019-04-
dc.identifier.citation2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), pp.335-335-
dc.identifier.urihttps://hdl.handle.net/10371/204859-
dc.description.abstractSnappy is a widely used (de) compression algorithm in many big data applications. Such a data compression technique has been proven to be successful to save storage space and to reduce the amount of data transmission from/to storage devices. In this paper, we present a fine-grained parallel Snappy decompressor on FPGAs running under a relaxed execution model that addresses the following main challenges in existing solutions. First, existing designs either can only process one token per cycle or can process multiple tokens per cycle with low area efficiency and/or low clock frequency. Second, the high read-After-write data dependency during decompression introduces stalls which pull down the throughput.-
dc.language영어-
dc.publisherIEEE COMPUTER SOC-
dc.titleA Fine-grained Parallel Snappy Decompressor for FPGAs Using a Relaxed Execution Model-
dc.typeArticle-
dc.identifier.doi10.1109/FCCM.2019.00076-
dc.citation.journaltitle2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM)-
dc.identifier.wosid000491873200067-
dc.identifier.scopusid2-s2.0-85068308520-
dc.citation.endpage335-
dc.citation.startpage335-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorLee, Jinho-
dc.type.docTypeProceedings Paper-
dc.description.journalClass1-
dc.subject.keywordAuthorFine grained Parallelism-
dc.subject.keywordAuthorFPGA-
dc.subject.keywordAuthorSnappy Decompressor-
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