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리세스 채널을 가지는 듀얼게이트 단전자 트랜지스터의 공정 방법 : Fabrication process of recessed channel dual gate-single electron transistor
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- Authors
- Advisor
- 이종덕
- Issue Date
- 2009
- Publisher
- 서울대학교 대학원
- Keywords
- Single Electron Transistor ; Single Electron Transistor ; recessed channel ; recessed channel ; dual gate ; dual gate ; self-align ; self-align ; parasitic MOSFET 억제 ; parasitic MOSFET suppression ; 공정 방법 ; fabrication process ; 상온 동작 ; room temperature operation
- Description
- 학위논문(석사) --서울대학교 대학원 :전기. 컴퓨터공학부, 2009.2.
- Language
- Korean
- URI
- http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000037026
https://hdl.handle.net/10371/44776
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