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VLSI for 5000-word continuous speech recognition
Cited 7 time in
Web of Science
Cited 12 time in Scopus
- Authors
- Issue Date
- 2009-04
- Citation
- IEEE International Acoustics, Speech and Signal Processing (ICASSP), pp. 557-560, Apr. 2009
- Keywords
- speech recognition ; very-large-scale integration ; LVCSR
- Abstract
- We have developed a VLSI chip for 5,000 word speakerindependent continuous speech recognition. This chip employs a context-dependent HMM (hidden Markov model) based speech recognition algorithm, and contains emission probability and Viterbi beam search pipelined hardware units. The feature vector for speech recognition is computed using a host processor in software in order to adopt various enhancement algorithms. The amount of internal SRAM size is minimized by moving data out to the external DRAM, and a custom DRAM controller module is designed to efficiently read and write consecutive data. The experimental result shows that the implemented system has a realtime factor of 0.77 and 0.55 using SDRAM and DDR SDRAM, respectively.
- ISSN
- 1520-6149
- Language
- English
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