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Access-Pattern-Aware On-Chip Memory Allocation for SIMD Processors

DC Field Value Language
dc.contributor.authorChang, Hoseok-
dc.contributor.authorSung, Wonyong-
dc.date.accessioned2009-08-06T04:46:24Z-
dc.date.available2009-08-06T04:46:24Z-
dc.date.issued2009-01-
dc.identifier.citationIEEE Trans. Computer-Aided Design of Intergrated Circuits and Systems, vol. 28, pp. 158-163, Jan. 2009en
dc.identifier.issn0278-0070-
dc.identifier.urihttps://hdl.handle.net/10371/6236-
dc.description.abstractThe number of cycles for each external memory access in Single Instruction Multiple Data (SIMD) processors is heavily affected by the access pattern, such as aligned, unaligned, or stride. We developed a high-performance dynamic on-chip memory-allocation method for SIMD processors by considering the memory access pattern as well as the access frequency. The access pattern and the access count for an array of a loop are determined by both code analysis and profiling, which are performed on a developed compiler framework. This framework not only conducts dynamic on-chip memory allocation but also generates optimized codes for a target processor. The proposed allocation method has been tested with several multimedia benchmarks including motion estimation, 2-D discrete cosine transform, and MPEG2 encoder programs.en
dc.description.sponsorshipThis work was supported in part by
Samsung Electronics Inc. and in part by the Ministry of Education, Science and
Technology, Republic of Korea under the Brain Korea 21 Project.
en
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.subjectCode generationen
dc.subjectdynamic memory allocationen
dc.subjectinterleaved memoryen
dc.subjecton-chip memory allocationen
dc.subjectSingle Instruction Multiple Data (SIMD) processoren
dc.titleAccess-Pattern-Aware On-Chip Memory Allocation for SIMD Processorsen
dc.typeArticleen
dc.contributor.AlternativeAuthor장호석-
dc.contributor.AlternativeAuthor성원용-
dc.identifier.doi10.1109/TCAD.2008.2009145-
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