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Issue Date	Title / Author(s) / Citation	File
2006	Low-jitter design techniques of fractional-N frequency systhesizers using multi-phase clocks 이형록	link
2015-04	A 3.7 mW Low-Noise Wide-Bandwidth 4.5 GHz Digital Fractional-N PLL Using Time Amplifier-Based TDC Elkholy, Ahmed; Anand, Tejasvi; Choi, Woo Seok; Elshazly, Amr; Hanumolu, Pavan Kumar IEEE Journal of Solid-State Circuits, Vol.50 No.4, pp.867-881	DOI
2024-02	A 12.8-15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation Kim, Juyeop; Jo, Yongwoo; Park, Hangi; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk IEEE Journal of Solid-State Circuits, Vol.59 No.2, pp.424-434	DOI