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Showing results 1 to 11 of 11

Issue Date	Title / Author(s) / Citation	File	Altmetrics
2004	A 2.4GHz 0.25um CMOS Dual-Mode Direct-Conversion Transceiver for Bluetooth and 802.11b Jung, Yeon-Jae; Jeong, Hoesam; Song, Eunseok; Lee, Jungho; Lee, Seung-Wook; Seo, Donghyeon; Song, Inho; Jung, Sanghun; Park, Joonbae; Jeong, Deog-Kyoon; Chae, Soo-Ik; Kim, Wonchan IEEE J. Solid-State Circuits, vol.39, pp.1185-1190	DOI
2004-09	Fast three-dimensional programmable two-selector Ahn, J.-S; Jeong, Deog Kyoon; Kim, Suhwan Electronics Letters, 2004, 40(18):1098	DOI
2007-05	Fast-locking CDR circuit with autonomously reconfigurable mechanism Woo, Jong-Kwan; Jeong, Deong-Kyoon; Kim, Suhwan Electronics Letters- IEE, 2007, 43(11):624	DOI
2007-07	A 0.25-μm CMOS 1.9-GHz PHS RF Transceiver With a 150-kHz Low-IF Architecture Jeong, Hoesam; Yoo, Byoung-Joo; Han, Cheolkyu; Lee, Sang-Yoon; Lee, Kang-Yoon; Kim, Suhwan; Jeong, Deog-Kyoon; Kim, Wonchan IEEE Journal of Solid State Circuits, vol. 42, no. 6, pp. 1318-1327	DOI
2008-01	Reducing Ground-Bounce Noise and Stabilizing the Data-Retention Voltage of Power-Gating Structures Kim, Suhwan; Choi, Chang Jun; Jeong, Deog-Kyoon; Stephen V., Kosonocky; Park, Sung Bae IEEE Transactions on Electron Devices, vol. 55, no. 1, pp. 197-205	view file DOI
2009-06	A High-Speed Range-Matching TCAM for Storage-Efficient Packet Classification Kim, Young-Deok; Ahn, Hyun-Seok; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Transactions on Circuits and Systems Part 1 Regular Papers, vol. 56, no. 6, pp. 1221-1230	view file DOI
2009-08	High-Speed 10-bit LCD Column Driver with a Split DAC and a Class-AB Output Buffer Woo, Jong-Kwan; Shin, Dong-yong; Jeong, Deog-Kyoon; Kim, Suhwan IEEE Transactions on Consumer Electronics, vol. 55, no. 3, pp. 1431-1438	view file DOI
2009-11	A 1.35GHz All-Digital Fractional-N PLL with Adaptive Loop Gain Controller and Fractional Divider Kim, Deok-Soo; Song, Heesoo; Kim, Taeho; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Asian Solid-State Circuits Conference, November 16-18, 2009 / Taipei, Taiwan, pp. 161-164	view file
2010-03	High-resolution time-to-digital converter utilising fractional difference conversion scheme Xing, Nan; Shin, W.-Y.; Jeong, K.-K.; Kim, Suhwan Electronics Letters- IEE (2010),46(6):398	DOI
2010-11	A 0.3–1.4 GHz All-Digital Fractional-N PLL With Adaptive Loop Gain Controller Kim, Deok-Soo; Song, Heesoo; Kim, Taeho; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Journal of Solid State Circuits, vol.45, no.11, pp. 2300-2311	DOI
2010-11	A 5-Gb/s Digitally Controlled 3-Tap DFE Receiver for Serial Communications Han, Jae-Duk; Shin, Woo-Yeol; Choi, Woo-Seok; Chun, Jung-Hoon; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Asian Solid-State Circuits Conference, November 8-10, 2010, Beijing, China	view file

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