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Showing results 1 to 16 of 16

Issue Date	Title / Author(s) / Citation	File	Altmetrics
2004	(A)Study on phase noise reduction techniques in planar microwave oscillators using Q factor improvement approaches 이영택	link
2005-06	Joint Channel Estimation and Phase Noise Suppression for OFDM Systems Kim, Seong-Cheol; Park, Yong-Wan; Lee, Jong-Ho; Yang, Jun-Seok VTC 2005-Spring. 2005 IEEE 61st Vehicular Technology Conference, 2005	view file DOI
2007	Physics-Based Noise Analysis of Electronic Circuits in Large-Signal Operation 홍성민	link
2007	Statistical channel estimation for OFDM systems over rading channels 김용화	link
2007	(A)Study on 3D MEMS inductor and its application to VCOs 이준엽	link
2008	A ring VCO with wide and linear tuning characteristics for a Cognitive Radio system Choi, Jaehyouk; Lim, Kyutae; Laskar, Joy 2008 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, VOLS 1 AND 2, pp.355-358
2015-03	A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for ΔΣ PLLs Lee, Yongsun; Kim, Mina; Seong, Taeho; Choi, Jaehyouk IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol.62 No.3, pp.635-644	DOI
2015-03	Analysis and Design of a Core-Size-Scalable Low Phase Noise <i>LC</i>-VCO for Multi-Standard Cellular Transceivers Seong, Taeho; Kim, Jae Joon; Choi, Jaehyouk IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol.62 No.3, pp.781-790	DOI
2016-08	A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier With a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector Choi, Seojin; Yoo, Seyeon; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.51 No.8, pp.1878-1889	DOI
2018-04	A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique Lee, Yongsun; Seong, Taeho; Yoo, Seyeon; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.53 No.4, pp.1192-1202	DOI
2019-04	An Ultra-Low-Jitter 22.8-GHz Ring-<i>LC</i>-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.4, pp.927-936	DOI
2019-06	A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration Yoon, Heein; Park, Suneui; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.54 No.6, pp.1564-1574	DOI
2021-01	A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator Yoo, Seyeon; Choi, Seojin; Lee, Yongsun; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.56 No.1, pp.298-309	DOI
2022-09	An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector Park, Suneui; Choi, Seojin; Yoo, Seyeon; Cho, Yoonseo; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.57 No.9, pp.2829-2840	DOI
2022-10	A Sub-100 fs-Jitter 8.16-GHz Ring-Oscillator-Based Power-Gating Injection-Locked Clock Multiplier With the Multiplication Factor of 68 Park, Suneui; Yoo, Seyeon; Shin, Yuhwan; Lee, Jeonghyun; Choi, Jaehyouk IEEE JOURNAL OF SOLID-STATE CIRCUITS	DOI
2023	Supply Noise Analysis and Noise, Power-Optimized Capacitor-less LDO Design for Ring Oscillators 김은서	view file link

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