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Showing results 1 to 5 of 5

Issue Date	Title / Author(s) / Citation	File
2017-07	Improved compact model for double-gate tunnel field-effect transistors by the rigorous consideration of gate fringing field Kim, Sangwan; Choi, Woo Young Japanese Journal of Applied Physics, Vol.56 No.8, p. 084301	DOI
2018-09	Compact Potential Model for Si1-xGex/Si Heterojunction Double-Gate Tunnel Field-Effect Transistors (TFETs) Kim, Sangwan; Choi, Woo Young Journal of Nanoscience and Nanotechnology, Vol.18 No.9, pp.5953-5958	DOI
2019-06	Ge Condensation Process for High ON/OFF Ratio of SiGe Gate-All-Around Nanowire Tunnel Field-Effect Transistor Lee, Ryoongbin; Lee, Junil; Kim, Sangwan; Lee, Kitae; Kim, Sihyun; Kim, Soyoun; Choi, Yunho; Park, Byung-Gook 2019 SILICON NANOELECTRONICS WORKSHOP (SNW), pp.51-52	DOI
2020-05	Physically Consistent Method for Calculating Trap-Assisted-Tunneling Current Applied to Line Tunneling Field-Effect Transistor Najam, Faraz; Kim, Sangwan; Choi, Woo Young; Yu, Yun Seop IEEE Transactions on Electron Devices, Vol.67 No.5, pp.2106-2112	DOI
2021-01	A low-power nanoelectromechanical (NEM) device with Al-doped HfO2-based ferroelectric capacitor Kim, Shinhee; Park, Jae Yeon; Go, Seungwon; Kwon, Hyug Su; Choi, Woo Young; Kim, Sangwan Solid-State Electronics, Vol.175, p. 107956	DOI