S-Space

Browse

Author

Showing results 1 to 3 of 3

Issue Date	Title / Author(s) / Citation	File
2019-06	Ge Condensation Process for High ON/OFF Ratio of SiGe Gate-All-Around Nanowire Tunnel Field-Effect Transistor Lee, Ryoongbin; Lee, Junil; Kim, Sangwan; Lee, Kitae; Kim, Sihyun; Kim, Soyoun; Choi, Yunho; Park, Byung-Gook 2019 SILICON NANOELECTRONICS WORKSHOP (SNW), pp.51-52	DOI
2020-06	Study on Etch Slope in Fin and Source/Drain Etch Process of Vertically-Stacked Nanosheet Gate-All-Around MOSFET Kim, Sihyun; Lee, Kitae; Park, Byung-Gook 2020 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW), pp.99-100	DOI
2020-06	Influence of Gate to Drain Underlap on Negative Differencial Resistance in Ferroelectric FET Lee, Kitae; Kim, Sihyun; Park, Byung-Gook 2020 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW), pp.95-96	DOI