New motion estimation algorithm using adaptively-quantized low bit resolution image and its VLSI architecture for MPEG2 video encoding

Abstract

This paper describes a new motion estimation algorithm that is suitable for hardware implementation and substantially reduces the hardware cost by using a low bit-resolution image in the block matching. In the low bit-resolution image generation, adaptive quantization is employed to reduce the bit resolution of the pixel values, which is better than simple truncation of the least significant bits in preserving the dynamic range of the pixel values. The proposed algorithm consists of two search steps: in the low-resolution search, a set of candidate motion vectors is determined, and in the full-resolution search, the motion vector is found from these candidate motion vectors. The hardware cost of the proposed algorithm is 1/17 times of the full search algorithm, while its peak signal-to-noise ratio is better than that of the 4 : 1 alternate subsampling for the search range of 32 32: A VLSI architecture of the proposed algorithm is also described, which can concurrently perform two prediction modes of the MPEG2 video standard with the search range of (􀀀32.0,􀀀32.0)–(+31.5,+31.5). We fabricated a MPEG2 motion estimator with a 0.5- m triple-metal CMOS technology. The VLSI chip includes 110 K gates of random logic and 90 K bits of SRAM in a die size of 11.5 mm 12.5 mm. The full functionality of the fabricated chip was confirmed with an MPEG2 encoder chip.