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Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity

Cited 8 time in Web of Science Cited 5 time in Scopus
Authors

Ansari, Md Hasan Raza; Kim, Daehwan; Cho, Seongjae; Lee, Jong-Ho; Park, Byung-Gook

Issue Date
2021-04
Publisher
IEEE
Citation
2021 5TH IEEE ELECTRON DEVICES TECHNOLOGY & MANUFACTURING CONFERENCE (EDTM)
Abstract
This work demonstrates design and performances of core-shell dual-gate nanowire synaptic transistor with short/long term plasticity. The novel structure helps equip better capacitive coupling between dual gates through full depletion of carriers from the Si channel and construct deeper potential well for charge storage, which eventually increases the probability for short-term-to-long-term memory transition by reducing the recombination. The dual-gate operation effectively realizes the short-and the long-term potentiation in the proposed device for hardware-driven neuromorphic system.
URI
https://hdl.handle.net/10371/186465
DOI
https://doi.org/10.1109/EDTM50988.2021.9420876
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