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Highly scalable 4F(2) cell transistor for future DRAM technology
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- Authors
- Issue Date
- 2020-06
- Publisher
- IEEE
- Citation
- 2020 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW), pp.81-82
- Abstract
- A novel 4F(2) dynamic random access memory (DRAM) cell transistor structure was proposed that can solve various process problems and special failure modes that caused by floating body. The suitability of the transistor scheme for future DRAM technology nodes was also verified. Through this new structure, it can expect to realize 4F(2) DRAM and continuously expand DRAM technology node.
- ISSN
- 2161-4636
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