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Influence of line-edge roughness on multiple-gate tunnel field-effect transistors
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Web of Science
Cited 1 time in Scopus
- Authors
- Issue Date
- 2017-02
- Publisher
- IOP Publishing Ltd
- Citation
- Japanese Journal of Applied Physics, Vol.56 No.4S, p. 04CD06
- Abstract
- The influence of fin-line-edge roughness (fin-LER) and gate-LER on multiple-gate (MG) tunnel field-effect transistors (TFETs) has been investigated compared with MG MOSFETs by using full three-dimensional technology computer-aided design (TCAD) simulation. From simulation results, two interesting results have been observed. First, MG TFETs show much less severe gate-LER than MG MOSFETs, which means that only fin-LER can be considered when evaluating the total LER of MG TFETs. Second, TFETs show similar to 3x more LER improvement than MOSFETs when their structures are changed from double-gate (DG) to triple-gate (TG) ones. Our findings provide the useful design guidelines of variation-tolerant TFETs. (C) 2017 The Japan Society of Applied Physics
- ISSN
- 0021-4922
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