Dual-dielectric-constant spacer hetero-gate-dielectric tunneling field-effect transistors

Abstract

Hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) with dual-dielectric-constant (k) spacers have been fabricated and characterized. They have a heterogeneous gate dielectric layer which consists of high-k material (HfO2) and SiO2 at the source and drain side, respectively. The dual-k spacer has an inner high-k and outer SiO2 spacer. The fabricated dual-k-spacer HG TFETs show higher on/off current ratio, on-current and better subthreshold slope than control TFETs which use only SiO2 for a gate dielectric layer and spacer. Moreover, the impact of the length of high-k material inserted under the gate (Lhigh-k) has been investigated. It turns out that the optimization of Lhigh-k can significantly improve performance and power efficiency.