A 170MHz-Lock-In-Range and-253dB-FoM&lt;sub&gt;jitter&lt;/sub&gt;, 12-to-14.5GHz Subsampling PLL with a 150μW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator

Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Yoo, Seyeon; Park, Hangi; Yoon, Heein; Choi, Jaehyouk

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A 170MHz-Lock-In-Range and-253dB-FoM<sub>jitter</sub>, 12-to-14.5GHz Subsampling PLL with a 150μW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator

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Authors: Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Yoo, Seyeon; Park, Hangi; Yoon, Heein; Choi, Jaehyouk

Issue Date: 2020

Publisher: IEEE

Citation: 2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC), pp.280-+

ISSN: 0193-6530

URI: https://hdl.handle.net/10371/199390

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College of Engineering/Engineering Practice School (공과대학/대학원)
- Dept. of Electrical and Computer Engineering (전기·정보공학부)
  - Journal Papers (저널논문_전기·정보공학부)

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Choi, Jaehyouk최재혁: 부교수

College of Engineering
Department of Electrical and Computer Engineering

Research Area Wired interconnection, Wireless communication

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