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A robust latch-type sense amplifier using adaptive latch resistance
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Song, Taejoong | - |
dc.contributor.author | Lee, Sang Min | - |
dc.contributor.author | Choi, Jaehyouk | - |
dc.contributor.author | Kim, Stephen | - |
dc.contributor.author | Kim, Gyuhong | - |
dc.contributor.author | Lim, Kyutae | - |
dc.contributor.author | Laskar, Joy | - |
dc.date.accessioned | 2024-04-25T04:13:03Z | - |
dc.date.available | 2024-04-25T04:13:03Z | - |
dc.date.created | 2024-04-25 | - |
dc.date.issued | 2010 | - |
dc.identifier.citation | 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010, pp.182-185 | - |
dc.identifier.uri | https://hdl.handle.net/10371/199449 | - |
dc.description.abstract | A latch-type sense amplifier (SA) utilizing adaptive resistance technique is proposed. With adaptively adjusted resistance in a latch path, the proposed SA can compensate for an erroneous voltage drop in bit-lines induced by bit-cell leakage current. The simulation shows that the sense amplifier margin (SM) is improved in the presence of mismatches. The SA test chip is fabricated in a 0.18-μm CMOS technology showing the SM improvement of 6% to 15% at various supply voltages. | - |
dc.publisher | IEEE | - |
dc.title | A robust latch-type sense amplifier using adaptive latch resistance | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/ICICDT.2010.5510258 | - |
dc.citation.journaltitle | 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010 | - |
dc.identifier.scopusid | 2-s2.0-77955618689 | - |
dc.citation.endpage | 185 | - |
dc.citation.startpage | 182 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Choi, Jaehyouk | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.subject.keywordAuthor | Bit-cell | - |
dc.subject.keywordAuthor | Latch sense amplifier | - |
dc.subject.keywordAuthor | Leakage current | - |
dc.subject.keywordAuthor | SRAM | - |
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- College of Engineering
- Department of Electrical and Computer Engineering
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