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A new compact high-efficiency mmWave power amplifier in 65 nm CMOS process
Cited 1 time in
Web of Science
Cited 12 time in Scopus
- Authors
- Issue Date
- 2015
- Citation
- 2015 IEEE MTT-S International Microwave Symposium, IMS 2015
- Abstract
- This paper presents a new design technique for high-efficiency CMOS mmWave power amplifier (PA). The proposed PA adopts NMOS capacitors connected at the gates of the transistors of the last amplifying stage to compensate gate capacitance variation over large signal swing, improving the linearity and the power efficiency. Implemented in 65 nm CMOS process, the presented PA consists of two differential stages, uses baluns, transformers and inductors to realize the input, output, and inter-stage power matching, and achieves a peak PAE of 24.2%, a 6 dB back-off PAE of 10.5% from 3 dB gain compression, a maximum gain of 17 dB, and a 3-dB bandwidth from 68 to 78 GHz. © 2015 IEEE.
- ISSN
- 0149-645X
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Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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