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Extending and Programming the NVMe I/O Determinism Interface for Flash Arrays

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Authors

Li, Huaicheng; Putra, Martin L.; Shi, Ronald; Kurnia, Fadhil, I; Lin, Xing; Do, Jae Young; Kistijantoro, Achmad Imam; Ganger, Gregory R.; Gunawi, Haryadi S.

Issue Date
2023-02
Publisher
Association for Computing Machinary, Inc.
Citation
ACM Transactions on Storage, Vol.19 No.1, p. 5
Abstract
Predictable latency on flash storage is a long-pursuit goal, yet unpredictability stays due to the unavoidable disturbance from many well-known SSD internal activities. To combat this issue, the recent NVMe IO Determinism (IOD) interface advocates host-level controls to SSD internalmanagement tasks. Although promising, challenges remain on how to exploit it for truly predictable performance. We present IODA,1 an I/O deterministic flash array design built on top of small but powerful extensions to the IOD interface for easy deployment. IODA exploits data redundancy in the context of IOD for a strong latency predictability contract. In IODA, SSDs are expected to quickly fail an I/O on purpose to allowpredictable I/Os through proactive data reconstruction. In the case of concurrent internal operations, IODA introduces busy remaining time exposure and predictable-latency-window formulation to guarantee predictable data reconstructions. Overall, IODA only adds five new fields to the NVMe interface and a small modification in the flash firmware while keeping most of the complexity in the host OS. Our evaluation shows that IODA improves the 95-99.99th latencies by up to 75x. IODA is also the nearest to the ideal, no disturbance case compared to seven state-of-the-art preemption, suspension, GC coordination, partitioning, tiny-tail flash controller, prediction, and proactive approaches.
ISSN
1553-3077
URI
https://hdl.handle.net/10371/201361
DOI
https://doi.org/10.1145/3568427
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