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A 7–8.5 GHz LC Voltage-Controlled Oscillator with –111.7 dBc/Hz Phase Noise at 1-MHz offset for Ultra-Low-Jitter Phase-Locked Loop

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dc.contributor.authorJo, Yong Woo-
dc.contributor.authorChae, Mun Jae-
dc.contributor.authorChoi, Jae Hyouk-
dc.date.accessioned2024-07-12T01:56:35Z-
dc.date.available2024-07-12T01:56:35Z-
dc.date.created2024-07-09-
dc.date.issued2023-
dc.identifier.citationIDEC Journal of Integrated Circuits and Systems, Vol.9 No.1, pp.1-5-
dc.identifier.urihttps://hdl.handle.net/10371/204620-
dc.description.abstractThis work presents an area efficiency LC voltage-controlled oscillator for an ultra-low-jitter phase-locked loop. Using a 3-turn area-compact spiral, the VCO achieve area-efficient without degrading LC-tank quality factor. The negative transconductance cell was NMOS type so that the start-up was done in 3ns. This work also includes a tail inductor for the noise filtering. As a result, the measured phase noise at 8 GHz was -111.7 dBc/Hz with 1 MHz offset and -134.9 dBc/Hz with 10 MHz offset. The power consumption was only 2.7 mW at 8 GHz. Also, the die area was less than 0.03 mm2.-
dc.language영어-
dc.publisher한국과학기술원 반도체설계교육센터-
dc.titleA 7–8.5 GHz LC Voltage-Controlled Oscillator with –111.7 dBc/Hz Phase Noise at 1-MHz offset for Ultra-Low-Jitter Phase-Locked Loop-
dc.typeArticle-
dc.identifier.doi10.23075/jicas.2023.9.1.001-
dc.citation.journaltitleIDEC Journal of Integrated Circuits and Systems-
dc.citation.endpage5-
dc.citation.number1-
dc.citation.startpage1-
dc.citation.volume9-
dc.identifier.kciidART002916377-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorChoi, Jae Hyouk-
dc.description.journalClass2-
dc.subject.keywordAuthorArea-efficient-
dc.subject.keywordAuthorJitter-
dc.subject.keywordAuthorLC-Oscillator-
dc.subject.keywordAuthorPhase-Locked Loop-
dc.subject.keywordAuthorTail inductor-
dc.subject.keywordAuthorVoltage-Controlled Oscillator (VCO)-
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  • Department of Electrical and Computer Engineering
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