S-Space College of Engineering/Engineering Practice School (공과대학/대학원) Dept. of Electrical and Computer Engineering (전기·정보공학부) Journal Papers (저널논문_전기·정보공학부)
Reversible energy recovery logic circuit without non-adiabatic energy loss
- Lim, Junho; Kwon, Kipaek; Chae, Soo-Ik
- Issue Date
- Electronics Letters- IEE, 1998, vol. 34, pp.344-346.
- The authors propose a reversible energy recovery logic (RERL)
circuit for ultra-low-energy consumption, whch consumes only
adiabatic energy loss and leakage current loss by completely
eliminating non-adiabatic energy loss. It is a dual-rail adiabatic
circuit using the concept of reversible logic with a new eight-phase
clocking scheme. Simulation results show that at low-speed
operation, the RERL consumes much less energy than the
complementary static CMOS circuit and other adiabatic logic
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